Category: Uncategorized

  • DesignCon 2026 Report: How AI Is Transforming the Future of Electronics Design

    People around the world kicked off the year enjoying CES and its parade of impressive new gadgets. But for me, the real excitement starts afterward—because it means DesignCon is here!

    In February 2026, DesignCon returned to the Santa Clara Convention Center, bringing together engineers, researchers, and hardware innovators from around the world. Known for its deep technical focus, the conference covers high‑speed digital design, signal and power integrity, EMC, and advanced EDA workflows.

    But this year felt different.

    DesignCon 2026 made one trend unmistakably clear:

    AI—especially large language models (LLMs)—and data‑center‑driven hardware innovation are reshaping the entire electronics design landscape.

    Below is a recap of the most impactful themes from the event.

    AI Moves from “Helpful Tool” to the Core of the Design Workflow

    The dominant conversation at DesignCon 2026 was not about incremental EDA improvements—but about the fundamental restructuring of design workflows by AI.

    Natural Language Driven Simulation Is Becoming Reality

    A standout theme was the emergence of workflows where engineers simply describe what they want in plain language.

    For example:

    • Specify the simulation type and desired output format in natural language
    • An AI agent configures the simulation setup
    • Runs the analysis on behalf of the engineer
    • Performs post‑processing
    • Presents results in the requested visualization style

    This represents a major shift: Engineers can now focus on intent, while the AI handles the technical overhead.

    From Text Description to Verilog: LLMs Enter Logic Design

    Another eye‑catching development was the use of small, fine‑tuned LLMs capable of converting functional descriptions written in natural language directly into Verilog code.

    The workflow looks like this:

    • Describe the desired logical behavior in plain English
    • The LLM generates synthesizable Verilog
    • Engineers refine or simulate the generated design

    This approach hints at a future in which LLM‑assisted RTL generation becomes a standard part of digital design methodology.

    AI Workloads Are Driving the Hardware Innovation

    AI’s computational appetite continues to grow. Much of DesignCon 2026 focused on the hardware innovation required to keep up.

    Advanced Packaging Takes Center Stage

    Multi‑die integration and advanced packaging technologies were everywhere at the conference.

    One prominent example:

    Packaging GPUs and HBMs together to eliminate PCB‑level interconnects.

    Benefits include:

    • Minimal impedance discontinuities, improving high‑speed signal integrity
    • Lower latency and higher bandwidth as a result

    Optical I/O Moves Inside the Package

    Another major trend was the rapid development of optical interconnect technologies. Traditionally, optical transceivers are placed at the edge of a PCB, requiring signals to travel through board traces before reaching the optical interface. This creates high-speed signal integrity challenges.

    DesignCon 2026 showcased a breakthrough direction: Integrating lasers and modulators directly inside the IC package.

    This shift enables:

    • Much shorter electrical paths, improving signal integrity
    • Higher‑speed node‑to‑node communication

    For data centers moving toward 448 Gbps interconnects and beyond, this is a game‑changing advancement.

    Automotive Topics Fade; Data Center Dominates

    In previous years, software-defined vehicles, autonomous vehicles, and EV‑related technologies were highly visible at DesignCon. That presence was notably muted in 2026.

    Instead, nearly all conversations centered on:

    • AI compute architectures
    • High‑speed interconnects
    • Memory bandwidth challenges
    • Data center scalability

    The industry’s near‑term priorities have shifted decisively toward meeting the needs of hyperscale and AI workloads.

    Conclusion: A New Era Defined by AI–Hardware Co‑Evolution

    DesignCon 2026 made it clear that we are entering a new chapter in electronics design—one where AI not only accelerates design workflows but also drives new hardware architectures.

    The cycle is now self‑reinforcing:

    • AI assists advanced hardware design
    • Hardware accelerates AI
    • The combination pushes both forward even faster

    From advanced packaging to optical I/O to AI‑driven EDA, the technologies showcased this year point toward a transformative future. The shift is already underway—and it’s accelerating.

  • Participation in JETRO’s Semiconductor Business Mission in Arizona

    I had the privilege of joining the Japan External Trade Organization (JETRO)’s Semiconductor Business Mission in Arizona, held from October 5 to 7, 2025. Participants were also invited to attend SEMICON WEST 2025, which took place at the Phoenix Convention Center from October 6 to 9. Below are some highlights and impressions from this meaningful experience.

    October 5 – Orientation and Networking Reception Hosted by JETRO

    Around 50 participants and JETRO representatives gathered at Pedal Haus Brewery in downtown Phoenix for an evening orientation and networking session. The JETRO team explained the mission’s schedule and key points, followed by a reception that provided valuable opportunities to connect with other participants.

    I met professionals from various fields, including semiconductor material manufacturers, logistics service providers, specialty material startups, chemical companies, banks, and heavy industry firms. It was also a pleasure to reconnect with several participants and JETRO staff I had met during the Quantum Mission held in June. (See our previous blog post)

    October 6 – Arizona Semiconductor Leadership Day

    The Arizona Commerce Authority (ACA) and the Greater Phoenix Economic Council (GPEC) hosted the Arizona Semiconductor Leadership Day, attended by industry leaders, suppliers, trade associations, and government officials participating in SEMICON WEST.

    Speakers included the Governor of Arizona and the Mayor of Phoenix, who shared insights into the region’s economic landscape. Panel discussions followed, featuring representatives from various regional economic development organizations. Key themes included:

    • Strong collaboration among local and state-level agencies,
    • Comprehensive support programs for companies establishing operations in Arizona,
    • A robust and modern infrastructure with minimal natural disaster risks, and
    • Direct flights from several Asian countries to Phoenix Sky Harbor International Airport.

    Panels featuring representatives from TSMC, Amkor, and Intel discussed their decisions to build fabs in Arizona and the advantages of operating there. Additional sessions included representatives from Arizona State University, The University of Arizona, and Northern Arizona University, highlighting close collaboration between academia, industry, and government in semiconductor R&D. Representatives from Maricopa Community Colleges, Central Arizona College, Pima Community College, and Grand Canyon University also discussed workforce development initiatives essential to the semiconductor ecosystem.

    October 6 – Networking with the Japan Business Association of Arizona (JBAA)

    In the evening, participants joined a networking event with members of the Japan Business Association of Arizona (JBAA) at the ACA building. After learning about JBAA’s activities, we had an engaging exchange with local Japanese business leaders.

    October 7 – Japan Forum at SEMICON WEST

    Within SEMICON WEST, the Consulate-General of Japan in Los Angeles, JETRO, and the Japanese Chamber of Commerce and Industry of Arizona (JCCIAZ) co-hosted the Japan Forum. JCCIAZ representatives presented Arizona’s strengths as a business environment and introduced Japanese companies active in the state’s semiconductor sector.

    During the luncheon, Professor Suganuma from the University of Osaka introduced research on automotive-grade 3D packaging and the Advanced SoC Research for Automotive (ASRA) consortium. Professor Ikeda from the University of Tokyo discussed the forefront of semiconductor design research and education in Japan, while Mr. Nakazawa from RISE-A explained the organization’s mission to strengthen Japan’s semiconductor ecosystem.

    The forum concluded with a reception, offering another excellent opportunity to network with many semiconductor industry professionals.

    Impressions

    I arrived in Arizona on the morning of October 5 and spent a few hours in Chandler, guided by my father-in-law who lives there. I was struck by the number of Waymo driverless taxis and the vibrant development of modern homes, apartments, and retail areas—a clear reflection of the region’s strong economy.

    The close collaboration among state and local governments, universities, community colleges, and industry has clearly fostered Arizona’s rapid semiconductor growth.

    At the Japan Forum, I learned that Japanese companies hold approximately 20% of the global share in semiconductor manufacturing equipment and 50% in materials supply—valuable insights for TSG U.S.A., Inc., as we are engaged in product design utilizing semiconductors.

    Overall, the mission provided not only rich networking opportunities but also first-hand understanding of the enthusiasm and commitment driving Arizona’s semiconductor industry. It was a truly rewarding experience.

  • Insights from the U.S. Quantum Ecosystem – Observations from the JETRO Quantum Delegation Tour in Chicago and Boston

    Thanks to the opportunity to join the JETRO-hosted Quantum Delegation, I had the privilege of visiting various quantum technology innovation hubs in the Chicago and Boston areas. This blog captures some of the key observations and insights I gained through site visits and conversations with researchers, startups, and ecosystem builders on the front lines of quantum technology advancement.

    Chicago Area

    Illinois Quantum & Microelectronics Park

    The State of Illinois is making a bold investment in the development of quantum technologies. One flagship project is the Illinois Quantum & Microelectronics Park. On the former site of the US Steel mill, a 128-acre state-of-the-art quantum tech hub is being constructed. What was once symbolic of Chicago’s industrial decline is now being transformed into the world’s largest quantum research campus. The project reflects the strong leadership and vision of state officials committed to revitalizing Illinois through innovation.

    Hyde Park Labs

    Operated by the University of Chicago, Hyde Park Labs is a research and coworking lab designed for entrepreneurs. The lab emphasizes medicine and quantum technology and will soon host IBM’s 156-qubit quantum computer. A dilution refrigerator will also be installed, and tenants will be able to rent access to the system on a short-term, reservation basis. Startups can begin research with minimal investment—even by renting just a single desk. The facility includes 40,000 sq ft of shared amenity including kitchens, decks, and lounges that foster collaboration and spontaneous innovation among people from various backgrounds.

    Argonne National Laboratory

    Funded by the U.S. Department of Energy, Argonne National Laboratory hosts the exascale supercomputer Aurora, equipped with 10,624 compute nodes. Each node includes dual Intel Xeon CPUs, 1TB DDR5 RAM, and six Intel GPUs with 128GB High Bandwidth Memory, all connected via PCIe. Nodes are networked using Slingshot 11 fiber-optic interconnects. The system supports shared-memory parallelization with OpenMP and distributed memory parallelization via MPI. Each node is water-cooled. Although I couldn’t tour it, Argonne also houses the Advanced Photon Source, a cutting-edge synchrotron radiation facility.

    mHUB

    mHUB is an incubator for manufacturing startups—truly a paradise for makers. It offers unrestricted access to tools such as 3D printers, plasma cutters, laser engravers, woodworking equipment, PCB rework stations, and even X-ray imaging machines. CAD/CAM licenses are included with membership. Operators are on-site to assist members in using the equipment, making it beginner friendly. Members also benefit from workshops, mentorship programs, investor connections, and even contract work opportunities that provide income before startups reach profitability. There are no specific eligibility criteria to join.

    EeroQ

    Located in The Terminal, a renovated locomotive parts factory turned high-tech office space, EeroQ is a quantum computing startup with a novel approach. Using CMOS technology to fabricate etched silicon wafers, they trap and control single electrons to form qubits. The system is cooled by superfluid liquid helium between the sillicon wafer and the trapped electrons. This method allows for long coherence times (up to 10 seconds) and leverages existing semiconductor manufacturing infrastructure. With a 50-person team of in-house experts, EeroQ handles all design and manufacturing internally.

    Boston Area

    CIC: Cambridge Innovation Center

    Located in Kendall Square, CIC is a flexible coworking space where companies—from startups to large enterprises—can rent space on monthly terms. CIC believes innovation thrives in a diverse environment. The space is ready for use from day one, complete with printers, internet, kitchens, showers, mailrooms, and meeting spaces. A dedicated Japan Desk team exists to support Japanese companies aiming to succeed in the U.S. market.

    QuEra Computing

    Born from research at Harvard University and MIT, QuEra builds quantum computers using laser cooling technology. Their 256-qubit system is accessed globally. Their machine has been used for research in lattice gauge theory and spin physics of condensed matter. The results of those research were published in prestigious scientific journals. Compared to superconducting quantum computers, QuEra’s approach offers advantages such as higher qubit density and no need for liquid helium cooling. One current bottleneck is the relative immaturity of precision laser control technology, which lags behind the more mature microwave control used in superconducting approaches.

    Networking and Reflections

    Throughout the visit, I had valuable conversations with individuals from diverse sectors: quantum startups, materials companies, heavy industry, banks, trading firms, national labs, and more. It became clear that there are many avenues for contributing to the advancement of quantum technology. At TSG U.S.A., Inc., we are motivated to explore ways we, too, can contribute to this exciting field.

    Footnote

    Many more companies and organizations kindly hosted us—thank you all. I regret I couldn’t include every visit here.